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Catalog of SIP Cores
System on Chip design resources
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Browse RISC-V
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55 IP
51
0.0
Nuclei UX600(SMP): 64-bit high-efficiency 6-stage-pipeline processor (with MMU) for Linux-capable applications
Entry-level 64-bit high-efficiency RISC-V core with MMU, belonging to Nuclei 600 Series. Comparable to ARM Cortex-A35/A53, supporting 64-bit Linux sys...
52
0.0
Nuclei UX900(SMP): 64-bit high-efficiency 9-stage-pipeline processor (with MMU) for Linux-capable applications
64-bit high-performance RISC-V core with MMU, belonging to Nuclei 900 Series. Comparable to ARM Cortex-A35/A53/A55, dual-issue execution, supporting 6...
53
0.0
Multi-core capable RISC-V processor with vector extensions and Intelligence Extensions
The SiFive Intelligence X280 is a multi-core capable RISC-V processor with vector extensions and SiFive Intelligence Extensions and is optimized for A...
54
0.0
eVocore I8500
Best-in-Class Performance EfficiencyThe I8500 is an in-order multiprocessing system with best-in-class power efficiency for use in SoC applications. E...
55
0.0
eVocore P8700
eVocore CPUs are the first MIPS products based on the RISC-V open instruction set architecture (ISA) standard. These multiprocessors have unique featu...
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